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Electronic Design Article: Low-Power Play: GAP8 Weds Multicore RISC-V With Machine Learning

By May 1, 2018May 12th, 2021No Comments

Machine learning (ML) on the edge often involves convolutional neural networks (CNNs). This can be done using standard processors, but there’s a cost due to performance and matching power requirements. Though specialized ML hardware can significantly reduce the amount of power, a programmable solution would provide a more flexible alternative.
GreenWaves Technologies brings a RISC-V-based solution to the table, building on the Parallel Ultra Low Power Platform (PULP). PULP is designed to support four different 32-bit, RISC-V cores, including RISCY, Zero-riscy, Micro-riscy, and Ariane. RISCY is an RV32-IMC core with a four-stage pipeline DSP, SIMD, hardware loop, bit manipulation, and post-increment extensions. Zero-riscy uses a two-stage pipeline with a RV32-IMC base, while Micro-riscy handles RV32-EC with only 16 registers and a two-stage pipeline. Ariane supports a 64-bit architecture with memory management, allowing it to run operating systems like Linux. It targets high-end applications.
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