Skip to main content
In the News

Last Week In RISC-V: Friday October 19, 2018

By October 22, 2018May 12th, 2021No Comments

Palmer Dabbelt, Engineer at SiFive

It’s been another week, which means it’s time to find another host for “Last Week in RISC-V”. This week we’re going to attempt a blog at, which will hopefully be a good long-term home for this series of articles.
As usual, you can find this week’s entry on Git Hub.
glibc Floating-Point Test Suite
As part of the RV32I glibc submission process, Zong from Andes has submitted a glibc patch set to fix a generic floating-point bug that crosses the boundary between GCC and glibc. There’s been a bit of feedback that, quite honestly, I don’t understand — the combination of floating-point and glibc macros pretty much guarantees that I won’t be able to read the diff.
Luckily, it appear some smart glibc maintainers have figured out what’s going on and have helped Zong work through some issues. I look forward to the v2 patch set!
binutils-2.31.1 Backports
Kito from Andes has backported a handful of fixes RISC-V specific fixes to binutils-2.31.1. The most important fix here is to avoid generating incorrect executables with PC-relative relocations that have addends, as was discussed in a previous post. Like usual, anyone distributing RISC-V toolchains should update.
Floating-Point Support in ptrace()
Jim has submitted a patch to add floating-point support to our ptrace() implementation. There are some interface issues in this version, but I’m sure they’ll get ironed out in time for the 4.20 merge window.
MUSL Support in riscv-gnu-toolchain
Nick Kossifidis has opened a PR to add support for MUSL to `riscv-gnu-toolchain’, which should be useful for anyone working on our MUSL port. We’re not upstream there yet, but reading the patches that Michael Clark sent upstream is still on my TODO list!
HiFive Unleashed Linux Drivers
Paul has posted a driver for thesifive,uart0serial controller as well as the associated device tree binding to the Linux mailing lists. There are some issues, but hopefully they’ll get resolved soon.
Additionally, Atish has a patch set containing drivers for our GPIO and PWM controller that was posted to the list last week.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.