EE Journal Article: RISC-V: The Groundswell Continues

So it was at last week’s RISC-V Summit, a four-day love-fest in the city named for Saint Clare in her eponymous California Valley of Heart’s Delight. What all the exhibitors and speakers had in common was a deep financial commitment to the somewhat new RISC-V processor architecture. Apart from that, however, their opinions, their motivations, and their convictions were all over the map.
RISC-V, of course, is “that Berkeley academic project,” a free and open-source (mostly) 32-bit RISC processor. As a CPU architecture, it sorta competes with ARM and MIPS and other licensable processor designs. And several people I spoke with were quick to compare RISC-V to those other processors, extolling the virtues of their chosen architecture and the shortcomings of all the others.
 
To read more, please visit: https://www.eejournal.com/article/risc-v-the-groundswell-continues/.