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QuickLogic Blog Post: eFPGA And PULP – The Ultimate (Low) Power Couple

By April 5, 2019May 12th, 2021No Comments

Back in August of last year we announced a collaboration with one of the top technical universities in Europe – ETH in Zurich, Switzerland. They were building a unique open-source SoC-based platform called “PULP”, which is short for “Parallel Ultra Low Power”. This platform is based on the concept of combining multiple RISC-V cores, each with their own memory subsystem, with other embedded IP to increase compute bandwidth while dramatically reducing overall power consumption.
They wanted to integrate our embedded FPGA (eFPGA) technology to allow users to make intelligent software/hardware trade-offs in order to optimize the platform bandwidth/power curve for various applications. In fact, they were the first to license our core for the Globalfoundries 22FDX® process node.
A specific example that we discussed in the press release announcing the collaboration was using the embedded FPGA logic to accelerate feature extraction for AI-based functions. By offloading those functions from the RISC-V processors on the platform to one or more hardware-based eFPGA blocks, users can speed up their designs while actually reducing the amount of power they consume.
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