Last week, Western Digital announced the performance enhancement and expansion of the development environment for the open source processor IP “SweRV Core.” The IP’s RTL (Register Transfer Level) can be downloaded from the GitHub repository. Western Digital is developing a processor that utilizes RISC-V ISA, and aims to apply it to application-specific processors such as storage controllers and machine learning.
To read more, please visit: https://monoist.atmarkit.co.jp/mn/articles/1906/24/news039.html. Please note that the original article is in Japanese.
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