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Mynavi Article: Western Digital Enhances Its Own RISC-V Core "SweRV RISC-V Core"

By June 21, 2019May 12th, 2021No Comments

Western Digital entered into a new strategic partnership with PlatformIO Labs in collaboration with SiFive on June 18th (US time) to extend and add new tools to the vendor-independent embedded development platform PlatformIO and to provide an end-to-end open environment for innovations such as RISC-V development.
Western Digital also announced enhancements to key features of the open source proprietary RISC-V core SweRV RISC-V Core and cache coherent fabric OmniXtend.
Western Digital claims that its strategic partnership with PlatformIO Labs will allow the company to fully introduce its multi-architecture embedded design environment from debug to trace into the open source community. Specifically, software programmers involved in architecture development such as RISC-V will be able to take advantage of PlatformIO Plus, which includes the PIO Plus Unified Debugger and PIO Uniting Testing Engine tools that PlatformIO had previously provided for a fee.
To read more, please visit: Please note that the original article is in Japanese.

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