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Andes’ Core Has RISC-V Vector Instruction Extension | Nitin Dahad, EE Times

By December 17, 2019May 12th, 2021No Comments

Andes’ new processor cores enable scalability by delivering RVV instruction extension and new memory subsystem. The company claims to be the first to deliver a core with the extension to a customer.
Andes Technology has released the AndesCore 27-series CPU cores, which it claims are the first licensable RISC-V core to deliver to a production licensee the RISC-V vector instruction extension (RVV). It has also re-architected the memory subsystem to sustain memory bandwidth and efficiency.

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