Early Access For RISC-V Enabled Low-Power SoC FPGAs | Alex Lynn, Electronic Specifier

By RISC-V Community NewsJanuary 31, 2020May 12th, 2021No Comments

The trend towards compute-intensive gateways and edge devices is driving the integration of traditional deterministic control applications with additional embedded processing capabilities needed for smart and secure connected systems. In response, Microchip Technology has announced the Early Access Programme (EAP) for the PolarFire System-on-Chip (SoC) FPGA.

article: https://www.electronicspecifier.com/around-the-industry/early-access-for-risc-v-enabled-low-power-soc-fpgas

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Early Access For RISC-V Enabled Low-Power SoC FPGAs | Alex Lynn, Electronic Specifier

Previous PostLinux 5.5 Release – Main Changes, Arm, MIPS and RISC-V Architectures | Jean-Luc Aufranc, CNX Software

Next PostSupercon Keynote: Megan Wachs Breaks Down RISC-V | Elliot Williams, Hackaday

Stay Connected With RISC-V