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Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores | Business Wire

By February 24, 2020April 28th, 2021No Comments

NUREMBERG, Germany–(BUSINESS WIRE)–Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, is exhibiting at Embedded World in Nuremberg, Germany on February 25-27, 2020. Aldec and Codasip will be showcasing an integrated UVM simulation environment for verifying custom instructions with RISC-V cores.

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