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Domain Specific Accelerators Will Drive Vector Processing on RISC-V | Charlie Cheng, EE Times

By May 29, 2020April 28th, 2021No Comments

When the RISC-V market first began, the initial rush was to cost reduce designs that would have otherwise used proprietary CPU instruction set architectures (ISAs) in deeply embedded applications. When these systems on chips (SoCs) began being fabricated in FinFET semiconductor process technology, the mask costs grew so expensive that many finite state machines were replaced with programmable micro sequencers based on the RISC-V instruction set. These created the initial excitement and later on the commoditization of simple RISC-V cores from 2014 to 2018.

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