RISC-V Deep Dive, CTO Interview | Dan Olds, Radio Free HPC

In this special edition of Radio Free HPC, we interview Mark Himelstein, RISC-V International Chief Technical Officer. In the discussion, we look at RISC-V from all angles, discussing how the opensource ISA is being used today and how it might be used tomorrow. And there’s a lot to consider. The European Processor Initiative has selected RISC-V as their accelerator of choice for their first exascale machines. The first system is expected in the 2022-2023 timeframe and will couple RISC-V accelerators with Arm processors.

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