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RISC-V is an exciting and rapidly-emerging technology. RISC-V is software; it is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. So far, this FAQ series has looked at how “RISC-V is growing and offers stability, scalability, and security,” the “Growing availability of tools reducing the risk of using RISC-V,” and “RISC V for artificial intelligence machine learning and embedded systems.” This final FAQ considers the use of RISC-V in ultra-low power applications.

PULP Platform

The Parallel Ultra Low Power (PULP) Platform started as a joint effort between the Integrated Systems Laboratory (IIS) of ETH Zürich and the Energy-Efficient Embedded Systems (EEES) group of the University of Bologna to explore new and efficient architectures for ultra-low-power processing.


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