SiFive Tapes Out Their First 5nm RISC-V Processor Core | Michael Larabel

SiFive’s OpenFive business unit announced today they have completed their first tape out of a RISC-V processor core using TSMC’s 5nm process.

This 5nm RISC-V SoC will be for “advanced AI/HPC” solutions using a chiplet architecture with SiFive 7-Series processor IP and OpenFive HBM3 IP subsystem.

SiFive announced their 5nm RISC-V processor tape out on their blog.

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