Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced a multi-year distribution and support agreement with Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on-chip implementations, to address the rapidly expanding worldwide market for RISC-V processor verification. RISC-V verification has 3 main components: 1) a design to test, 2) a reference model for comparison, and 3) tests to fully exercise the design. A verification plan details the objectives in terms of coverage metrics and requirements including asynchronous events, debug modes, and the analysis-to-resolution process.
A key advantage of the Valtrix STING verification environment and test generator is the ease of use, including user controls for every test parameter, enabling every test condition to be mapped to a particular test configuration for the Device Under Test (DUT). Since a processor is by definition a complex state machine with multi-modes, dynamic testing has proven to be the most trusted option for targeted test suites and the interactions with asynchronous events. The key task for DV teams is to analyze bugs and then adapt the test case scenarios to fully explore the related state-space for additional issues.