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Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International will contribute five presentations at the RISC-V Summit from December 6 to 8, 2021. The company will also demonstrate its latest RISC-V IP in a prominent booth in the RISC-V Summit Exhibition Hall.

Andes President and CTO, Dr. Charlie Su, will deliver the keynote speech “Beefing Up the Datacenter Accelerators” on December 7 at 1:45 PM. On December 8 at 4:00 PM, Dr. Paul Ku, Deputy Technical Director of Architecture Div., will provide IOPMP updates in his presentation “The Protection of IOPMP.”

Read the full announcement. 

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