Imperas RISC-V golden reference models and Verification IP used for functional RISC-V Processor Verification and Architectural Compatibility Testing.
Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced with MIPS, Inc., the processor technology company focused on the commercialization of RISC-based processor architectures and IP cores, the continuation and extension to the long-standing relationship with simulation and verification support for RISC-V. Since 2010, MIPS has partnered with Imperas for proprietary simulation technology and reference models for both internal engineering and customer ISS solutions. As the design and verification team transitions to the RISC-V open ISA (Instruction Set Architecture), the Imperas reference models for RISC-V form the essential reference for the processor functional verification tasks.