Skip to main content

Imperas RISC-V Reference Model, Test suites and Verification IP for advanced ‘lock-step-compare’ Processor Verification including Asynchronous events and Coverage Analysis.

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that NSITEXE, Inc., a group company of the DENSO Corporation that develops and sells high-performance semiconductor IP for automotive applications, has selected ImperasDVTM for advanced RISC-V processor hardware design verification. This expands and extends the use of Imperas simulation technology, models, verification IP and tools by NSITEXE for the next generation of 64bit RISC V based designs featuring vector accelerators for AI (Artificial Intelligence) automotive applications with verification leading to the level required to achieve ISO 26262 ASIL D.

RISC-V is an open standard ISA (Instruction Set Architecture) that allows processor developers to optimize the configuration with both standard extensions and custom instructions. The recently ratified RISC-V Vector Extensions supports the compute requirements for hardware accelerators for applications involving linear algebra, which is well suited for the emerging AI algorithms and workloads in advanced automotive applications.

Read the full announcement. 

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.