RISC-V International has announced a new batch of specifications detailing extensions and standards, which can be added to the RISC-V instruction set architecture — the first to be ratified so far this year.
“These new specifications accelerate embedded and large-system design,” explains RISC-V International chief technical officer Mark Himelstein. “Debugging is one of the hardest things to do on a chip. E-Trace for RISC-V creates a standard way to do processor trace that’s extremely efficient and is especially useful in embedded system design.”