Imperas Software in the UK has developed the first open source SystemVerilog RISC-V processor functional coverage library for RISC-V cores.
The initial release is for RV32IMC, RV64 and other ratified extensions are under development and will also be released as part of the riscvOVPsimPlus package with a free-to-use permissive license. This covers free commercial as well as academic use.
Imperas is a leading developer of verification tools for the RISC-V open instruction set architecture and had previously developed these libraries over time to support multiple customer projects and users. It was also involved in the IoT development kit launched at Embedded World in June.