Skip to main content
In the News

First open-source SystemVerilog RISC-V processor functional coverage library | Nick Flaherty, EE News Europe

By August 2, 2022August 30th, 2022No Comments

Imperas Software in the UK has developed the first open source SystemVerilog RISC-V processor functional coverage library for RISC-V cores.

The initial release is for RV32IMC, RV64 and other ratified extensions are under development and will also be released as part of the riscvOVPsimPlus package with a free-to-use permissive license. This covers free commercial as well as academic use.

Imperas is a leading developer of verification tools for the RISC-V open instruction set architecture  and had previously developed these libraries over time to support multiple customer projects and users. It was also involved in the IoT development kit launched at Embedded World in June.

Read the full article. 

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.