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Imperas and Andes collaborate to support RISC-V innovations | Andes Technology and Imperas Software

Imperas reference models for Andes expanded with Andes Custom Extension™ support and design flow integration for leading EDA environments, plus new AndesCore® N25F-SE core for functional safety applications.

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Andes Technology Corp., a leading supplier of performance-efficient and extensible 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, has certified the Imperas reference models for the complete range of Andes processor IPs with Andes Custom Extension™ (ACE) support and the new AndesCore® N25F-SE targeted at Functional Safely applications. Developers can now use the Imperas reference models to evaluate multicore design configuration options for SoC architecture exploration, including custom instructions and full design flow integration with leading EDA tool environments.

Imperas models are often used in a ‘software first’ design flow that incorporates virtual-platforms / virtual-prototypes, as SoC developers explore new hardware configuration options with the application software workload and full OS supports. Traditionally, the use of virtual prototypes in a project for software development is a key piece of a company’s ‘shift-left’ strategy to accelerate schedules. Virtual prototypes shift schedules left by months because the models are available without the delays normally associated with implementations that are all dependent on the availability of a full RTL representation of the hardware. Now developers can also explore custom instructions with the Imperas models of the Andes cores utilizing the ACE framework.

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