Skip to main content
In the News

GHAZI: An Open-Source ASIC Implementation of RISC-V based SoC | Zain Rizwan Khan, Wajeh ul Hasan, Zeeshan Rafique, Ali Ahmed Ansari, Syed Roomi Naqvi

By January 1, 2023January 4th, 2023No Comments

Abstract—Due to the closed source, expensive nature of digitaldesign tools and licensing cost of System on Chip (SoC) IPsfor ASIC, the hardware industry lacks innovation and designreuse. In the last few years, the hardware industry is seeingopen-source adaptions, just like the software ecosystem. Thispaper presents a methodology of adapting complete open-sourcedigital tooling, ISA, IPs and manufacture-able PDKs to tapeout aminimalist RISC-V based SoC named GHAZI. The methodologyuses an RV32IMC core and an SoC reference design fromOpenTitan (Ibex core and peripherals respectively) at base,adding instruction and data memories, converting the designinto verilog for the RTL to GDSII flow with opensource tools,alongside an FPGA implementation for Xilinx Arty-7 FPGA,finally generating the GDSII layout using OpenLane on Skywater130nm PDK.

Read the full paper.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.