RISC-V, introduced in 2010, is the first novel instruction set architecture (ISA) to gain market traction in decades. New design firms such as SiFive — founded by the credited inventors of RISC-V at the University of California, Berkeley — as well as Ventana, lowRISC and FOSSi were built around this ISA, but many Arm licensees, such as Renesas and Qualcomm, are joining them, adding RISC-V designs to their product portfolios.
RISC-V largely started in embedded and Internet of things (IoT) applications, scaling up to uses in smartphones and single-board computers. There’s been significant investment toward using the ISA for artificial intelligence (AI) and machine learning workload accelerators and as a fully fledged competitor to CPUs for data centres.
Production readiness was the prevailing theme at the fifth annual RISC-V Summit in December 2022. Several firms praised the open-source, royalty-free ISA and showcased core designs available under licence for inclusion in a custom chip or as a finished chip ready for integration in a larger product.