LLVM 17 Lands Initial Support For RISC-V Vector Crypto Extension ISA

By RISC-V Community NewsMarch 26, 2023March 28th, 2023No Comments

Merged this weekend to the LLVM 17 development code-base is initial support for RISC-V’s vector crypto extension ISA.

The latest LLVM (17) Git code has initial support for the v0.3 draft specification of the vector crypto extension ISA, which aims to speed-up cryptographic operations on future RISC-V processors. These instructions were developed by Brandon Wu at SiFive.

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LLVM 17 Lands Initial Support For RISC-V Vector Crypto Extension ISA

Previous PostCanonical Enables Ubuntu on Microchip’s PolarFire® SoC FPGA

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