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Codasip collaborates with Siemens to deliver trace solution for custom processors

By September 8, 2023September 25th, 2023No Comments

Codasip has announced its collaboration with Siemens to offer the Tessent Enhanced Trace Encoder solution with its customizable RISC-V codes.

Codasip®, the leader in RISC-V Custom Compute, now offers the Tessent™ Enhanced Trace Encoder solution from the Tessent Embedded Analytics product line at Siemens EDA with its customizable RISC-V cores. Through the joint solution, developers can efficiently trace and debug issues between silicon and software, and accurately understand real-time behaviors of even the most complex customized designs based on Codasip RISC-V processors™.

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