Skip to main content
In the News

Codasip delivers processor security to actively prevent the most common cyberattacks

Munich, Germany, 31 October 2023 – Codasip, the leader in RISC-V Custom Compute, today announced the first commercial implementation of CHERI, the advanced security mechanism the semiconductor industry needs. Capability Hardware Enhanced RISC Instructions (CHERI) technology was developed at the University of Cambridge as the result of research aimed at revisiting fundamental design choices in hardware and software to improve system security. The technology has been proven in experimental processors and will now for the first time be available in a commercial offering, enabling secure-by-design products. Codasip’s commercial implementation will enable companies to take preventive security measures without having to wait for their vendors’ delivered patches.

Read the full release.

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.