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RISC-V Based Architecture Integrates Complex Memory Tasks to Processor

By January 31, 2024February 5th, 2024No Comments

Processor Akurra, modifies the standard RISC-V architecture and instruction set to support their memory allocation technology.

VyperCore, a UK-based startup located in Bristol, has achieved a significant milestone in the development of a new chip architecture that incorporates RISC-V. They have successfully demonstrated the RTL (Register-Transfer Level) design of this technology in a RISC-V processor simulation, executing code for the first time. They plan to release a hardware version of this technology by June 2024.

Read the full release here.

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