Europe Roadshow Proceedings
September, 2019
In collaboration with the Linux Foundation, the RISC-V Foundation hosted a series of free, Getting Started with RISC-V events in Tel Aviv, Munich, Berlin, Tallinn, Paris, and London. These events showcased innovative RISC-V implementations from members of the Foundation.
The roadshow featured talks from AdaCore, Andes Technology, GreenWaves Technologies, Imperas, Microchip Technology, Minres, OneSpin, SiFive, Syntacore, Thales, Trinamic and Western Digital.
Check out the agenda and slides to learn more.
Agenda and Presentation Slides
Presentation | Speaker, Affiliation | Slides |
Introduction to RISC-V | Calista Redmond, RISC-V Foundation | Slides |
Embedded Software Development for RISC-V Based SoC | Rocco Jonack, Minres Technology GmbH | Slides |
Rocinante: Motor Control SoC with Integrated RISC-V Core | Göran Eggers, Trinamic Motion Control | Slides |
SweRV Core & CHIPS Alliance Initiatives | Ted Marena, Western Digital | Slides |
SCRx Family of the RISC-V Compatible Processor IP by Syntacore | Alexander Redkin & Ivan Piatak, Syntacore | Slides |
RISC-V SoC FPGA Brings Real-Time to Linux | Luca Cattaneo, Microchip Technology | Slides |
Machine Learning on Battery Operated Devices at the Very Edge Using a Multi-core RISC-V Based Processor | Martin Croome, Greenwaves | Slides |
Fast Start into RISC-V for AIoT with A+ Core | Florian Wohlrab, Andes Technology | Slides |
Verifying the Full Scope of RISC-V Integrity | Sven Beyer, OneSpin | Slides |
SiFive Cloud Design Services for IP Evaluation | Kenneth Østby, SiFive | Slides |
Verification and Customization of RISC-V Cores and SoCs | Kevin McDermott, Imperas Software | Slides |
High Reliability C/Ada/SPARK Solutions for Software Development on RISC-V | Fabien Chouteau & Le Yin Kéu, AdaCore | Slides |