The ability to mix and match multiple ISA extensions and add user-defined ISA extensions makes RISC-V verification more challenging than conventional processor verification. This Synopsys webinar demonstrates the verification of...
The RADiation and its Effects on Components and Systems Conference (RADECS) is the annual European scientific and industrial forum on radiation and its effects on electronics and photonic materials, devices,...
Come learn about the RISC-V Mentorship program and how you can work with paid mentees to fast track your project! See full program details here: https://riscv.org/risc-v-mentorship-program/https://riscv.org/risc-v-mentorship-program/ Benefits for Mentors: Create a...
RISC-V Open Hours provides the opportunity for the community to interact outside of the bounds of mailing lists, with a particular focus on RISC-V support in open source software projects...
The RISC-V movement is gaining momentum worldwide, and Pakistan is emerging as a formidable player. We're excited to bring to you the RISC-V Karachi Meetup - a unique gathering that...
Join us online to discuss hardware releases, the state of various software projects, and some updates on the FPGA project.
Ever wonder what the daily tasks and career progress look like for popular RISC-V Job titles? Hear from experts on their journey and what their day to day jobs entail.
RISC-V Open Hours provides the opportunity for the community to interact outside of the bounds of mailing lists, with a particular focus on RISC-V support in open source software projects...
IC Tech in the AI Era AI development has reached a critical turning point. Large Language Models (LLMs) have attracted great attention recently and require a lot of calculations for...
Connecting the Dots: Empowering the Semiconductor Community SemIsrael Expo 2023 is the premier professional semiconductor event in Israel. The event brings together hundreds of Israeli semiconductor professionals from all fields...
The last thing you want to do when adding custom instructions to your RISC-V design is to unintentionally insert some deep corner case bug – the kind of bug that’s...
RISC-V Open Hours provides the opportunity for the community to interact outside of the bounds of mailing lists, with a particular focus on RISC-V support in open source software projects...
We send occasional news about RISC-V technical progress, news, and events.
