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Electronic Design Article: Hard-Core RISC-V Cores Mate With FPGA

By December 7, 2018May 12th, 2021No Comments

By integrating hard-core RISC-V CPUs with its latest FPGAs, Microsemi, a Microchip company, has further bolstered its RISC-V support. This is the same approach that Intel/Altera and Xilinx have done with Arm cores and their system-on-chip (SoC) FPGA offerings. Microsemi also has an FPGA with a hard-core ARM Cortex-M3, but its Mi-V initiative has been pushing soft-core RISC-V support in its FPGA lines.
Microsemi’s 64-bit RISC-V SoC FPGA is based on its PolarFire FPGA. The approach has a number of advantages, including a simplified design that’s easier to secure. The design is immune to Spectre- and Meltdown-style attacks. The company has also included anti-tamper support, differential-power-analysis (DPA) resistant bitstream programming, cryptographic bound supply-chain assurance, physically unclonable function (PUF) support, a side-channel resistant crypto coprocessor, and a true random number generator. In addition, all memory has single-error-correction, double-error-detection (SECDED) support.
The RISC-V approach also provides a lower-cost migration path to an ASIC for those designs that are more geared to high volumes. The kicker is that these cores can be configured to provide deterministic operation.
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