Moore Core News Article: RISC-V Adds Icing To AI Edge Computing Chip Development

RISC-V (Risk-Five) is a RISC ISA that originated from UC Berkeley and has the main features of High Quality, No license fee, No Royalty. Instruction set architecture standard).
The RISC-V standard is maintained by the non-profit organization RISC-V Foundation.RISC-V ISA is suitable for a variety of computing systems from microcontrollers to supercomputers. In today’s RISC-V industry, there are already many commercial and open source CPU cores. The industry and academia are rapidly adopting the instruction set architecture, and more importantly, getting more and more high-growth and user-shared software ecosystem support. What’s more interesting is that the RISC-V ecosystem is an evolving, open, flexible and symbiotic community-based “living body.”
 
To read more, please visit: http://news.moore.ren/industry/106252.htm. Please note that the original article is in Chinese.