Skip to main content
In the News

Linux on RISC-V with Open Source Hardware (OSSummit Japan 2020) | Drew Fustini

By November 26, 2020December 4th, 2020No Comments

Want to run Linux on open hardware?

This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge.

I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry.

Finally, I will look at what Linux-capable “hard” RISC-V SoC’s currently exist, and what is on the horizon for 2021.

This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V.

Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.

Google Slides link https://tinyurl.com/y6j8lfyz

Stay Connected With RISC-V

We send occasional news about RISC-V technical progress, news, and events.