This talk will be about a 32-bit homemade RISC-V CPU, made only out of discrete logic components and memories. There are no FPGAs nor any microcontrollers used and the whole project can be found on GitHub as open-source. The goal of this project is to introduce more people to RISC-V with a CPU that can be build by anybody who can solder. The presentation will be supplemented by a live demo of the CPU as well as some plans for the upcoming version. Filip Szkandera is a student of Higher School and Secondary School of Electrotechnical Engineering in Olomouc, Czech Republic. He is interested in electronics, especially in building his own CPU(s). He is 19 years old.
Stay Connected With RISC-V
We send occasional news about RISC-V technical progress, news, and events.
Copyright © 2023 RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International. For trademark usage guidelines, please see our Brand Guidelines and Privacy Policy