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Implementation of RISCduino core using a Hierarchical Design Flow | Dinesh Annayya, OpenRoad

By January 9, 2023January 10th, 2023No Comments

Dinesh Annaya is an ardent Open-Source EDA enthusiast and an expert user of OpenROAD and OpenLane. He developed a baseline RISCduino SoC, a single, 32 bit RISC-V based controller compatible with the Arduino platform . He has submitted over 15 designs on Open MPW shuttles on sky130- During the course of his design journey, he successively improved the design architecture for better performance, and enhanced functionality. His main motivation for the use of Open-Source EDA tools is to gauge quality of results and potential for commercial use.

A flat design approach forces design implementation to a single module which increases runtime and design complexity. Dinesh uses a hierarchical design flow methodology to reduce runtime, memory usage, and to meet his design, performance and area goals for implementation on the Caravel top-level SoC.

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