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Trio support RISC-V development from SoC concept to deployment

By March 13, 2023March 28th, 2023No Comments

Imperas Software has announced with MIPS and Ashling a new 3-way collaboration to support developers across all aspects of RISC-V software development for advanced processor applications. Based on the Imperas reference models for the MIPS eVocore P8700 RISC-V Multiprocessor, together with Ashling’s RiscFree™ SDK tools, this collaboration extends beyond the standard level of ecosystem support to enable developers across all design phases from pre-silicon to prototype devices to end users.

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