Blog Post: Recap Of The Third Bay Area RISC-V Meetup At Rambus

On Sept. 13, Rambus hosted the third Bay Area RISC-V Meetup at the company’s campus near Moffett field. There was a great view from the seventh floor where the meeting was held. Western Digital and SiFive had hosted the previous two Meetups, and it was great to see RISC-V member companies continue to support the Meetup efforts and enable discussion around RISC-V. There were approximately 120 people who attended the…

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ElectronicDesign Article: Not Your Father’s FPGAs Anymore

FPGAs, like GPUs, have changed significantly from their initial inception that took a narrower view of the solution space. They’ve morphed from a collection of gates and routing to taking on jobs that range from communications to artificial intelligence (AI).Soft-core processors have been common since FPGAs appeared. Some vendors had their own optimized soft-core processors, such as Intel and its NIOS II and Xilinx with its MicroBlaze. There are a…

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SiFive Joins Microsemi’s New Mi-V Ecosystem To Accelerate Adoption Of RISC-V Open Instruction Set Architecture

Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced SiFive, the first fabless provider of customized, open-source-enabled semiconductors, has joined Microsemi’s new Mi-V™ RISC-V ecosystem, further building out the growing ecosystem and expanding the number of RISC-V designs users can consider. Microsemi will leverage its strategic relationship with SiFive and other ecosystem participants to increase adoption of RISC-V open instruction set architecture (ISA) central processing units (CPUs)…

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The Register Article: WDC To Move All Its Stuff To RISC-V Processors, Build Some Kind Of Super Data-Wrangling Stack

Western Digital has grandly announced its will use the open-source RISC-V processor architecture in all future products and “intends to lead the industry transition toward open, purpose-built compute architectures to meet the increasingly diverse application needs of a data-centric world.”To read more, please visit: https://www.theregister.co.uk/2017/12/01/wdc_risc_v_edge_strategy/

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Tom’s Hardware Article: Big Tech Players Start To Adopt The RISC-V Chip Architecture

RISC-V (pronounced risc-five) is a brand-new instruction set architecture (ISA) that’s open to customize and free to use by anyone. The ISA is only a few years old, but both large and small companies, such as Nvidia, Western Digital, and Esperanto, are now planning to use RISC-V chips to power their products.To read more, please visit: http://www.tomshardware.com/news/big-tech-players-risc-v-architecture,36011.html

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